The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 1981
Filed:
Jan. 28, 1980
Teruo Nakamura, Tokyo, JP;
Nippon Electric Co., Ltd., Tokyo, JP;
Abstract
A multiprocessor initialization sequence provides diagnostic routines in each processor and interconnects the several processors only if the diagnostic routines indicate positive results. Apparatus external to the individual processors places the processors in an initialization mode during which time the diagnostic routines will be run. A host selection signal is sent to one of the plural processors and that processor in turn sends subprocessor selection signals to all of the other processors. The diagnostic routine for a given processor is initiated in response to either a host selection signal or a subprocessor selection signal. If a failure is detected in the diagnostic routine in the host processor, the failure is registered and sent to all subprocessors. If a failure is detected in a subprocessor, it is simply registered as a failure but not sent to the host processor. If there are no failures detected in a subprocessor, and if the subprocessor did not receive a failure indication signal from the host, this subprocessor will connect directly to the communication interconnection path for communicating between the various processors. If no failure is detected in the diagnostic routine of the host processor, the host processor will await the receipt of an end report from the subprocessor which signal indicates that the subprocessor completed its diagnostic routine without any failures being detected. When the end report signal is received within a given time, the host processor will be connected to the communications interconnection paths.