The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 1981

Filed:

Dec. 03, 1979
Applicant:
Inventors:

Joseph Bittar, Simsbury, CT (US);

Arnold Mendelsohn, Simsbury, CT (US);

Assignee:

Otis Elevator Company, Hartford, CT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B66B / ;
U.S. Cl.
CPC ...
187 / ;
Abstract

A plural elevator system having a group controller for controlling the joint response of a plurality of elevator cars to the needs of a building, employs a microprocessor-based group controller for providing up peak, down peak and other zone-controlled elevator functions. The group controller provides a variable interval between dispatching of elevator cars from the lobby during up peak, the dispatching interval being controlled by the approximate round trip time of an elevator being dispatched from the lobby in serving the car calls registered within it and returning to the lobby, or the average of the approximate round trip time for two or three most recently dispatched elevator cars. The dispatching interval is determined by the approximate round trip time divided by the number of elevator cars serving the up peak traffic. In addition, the dispatching interval can be further reduced in dependence upon the number of cars standing at the lobby, the reduction being greater in case the last car leaving the lobby is not more than half full than in the case when the last car leaving the lobby is more than half full. Exemplary elevator and microprocessor structure, an overall group controller microprocessor program logic flowchart, illustrative of the environment of the invention, and detailed logic flowcharts illustrative of an embodiment of the invention are disclosed.


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