The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1981

Filed:

Aug. 27, 1979
Applicant:
Inventors:

Ralph N Dietrich, Georgetown, IN (US);

Stephen L Howell, Jasper, IN (US);

John W Robinson, Jasper, IN (US);

Assignee:

Kimball International, Inc., Jasper, IN (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G10H / ;
U.S. Cl.
CPC ...
84-103 ; 84-124 ; 84DI / ;
Abstract

An electronic rhythm generator which comprises a large read only memory having a plurality of rhythm patterns and rhythm break patterns programmed therein, player operated selector switches for selecting a rhythm pattern and a break pattern, scanning circuitry for sequentially addressing the memory to read out the stored rhythm pattern, and, when the break circuitry is activated, reading out the break pattern in place of or in addition to the rhythm pattern. The rhythm generator is contained on a single monolithic integrated circuit chip with the pattern selection being accomplished by an external multiplexer driven by an internally generated scan word. The break activation circuitry automatically corrects for improper matching of a rhythmically incompatible rhythm pattern and break pattern by either ignoring the break command or substituting a compatible break pattern in place of the selected break pattern. Channel inhibit circuitry at the input and output of the memory permits selective playing of certain ones of the instrument channels during a rhythm break regardless of whether the break is generated internally of the chip or externally by means of a separate break generator.


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