Malfunction detector for a group of cyclically interconnected

Abstract

Three or more oscillators to be locked in phase with one another are interconnected in a closed ring and have individual feedback loops including respective frequency dividers designed to keep them in step with a synchronizing frequency, equal to a fraction of their own operating frequency, fed in through an associated multiplexer. The multiplexer has a first input receiving the stepped-down feedback frequency of the immediately preceding oscillator, a second input connected to the output of the associated frequency divider, and a third input energizable with an external reference frequency such as a carrier of a PCM of FDM system. Each multiplexer, in the absence of an external switching command which holds it on its third input, stands on its first input unless a control circuit associated with the immediately preceding oscillator detects a disparity between the two frequencies fed to that preceding oscillator via the feedback loop and the multiplexer of the latter. In the event of such a disparity, indicating a malfunction of the oscillator associated with the control circuit detecting same, the multiplexer associated with the next-following oscillator is switched onto its second input to transform the phase-locking ring into an open-ended cascade, with emission of an alarm signal identifying the defective oscillator. Each frequency divider is provided with a self-checking circuit emitting a different alarm signal in the event of a malfunction thereof.