The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 1981

Filed:

Jun. 13, 1979
Applicant:
Inventors:

Edward C Hepworth, Austin, TX (US);

Rodney J Means, Tempe, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
328 37 ; 3072 / ; 364900 ;
Abstract

A digital logic circuit provides character framing for a continuous stream of synchronous serial data characters. The digital logic circuit includes a shift register arranged for serial loading and parallel unloading of the received serial data characters. The parallel unloading of a received character triggers control logic to force a control code prefix consisting of a series of logical '1's with a trailing logical '0' into the individual shift register stages. Serial loading of the next serial data character results in successive shifts of the control code prefix through the shift register stages. Serial loading continues until the trailing logic '0' shifts into a 'shift register full' stage and is detected by the control logic. Detection of a change of state in the 'shift register full' stage causes parallel unloading of the received serial data character followed by another forcing of the control code prefix to reinitiate the parallel unloading sequence.


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