The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 1981

Filed:

Aug. 24, 1979
Applicant:
Inventors:

Yoshichika Ichimiya, Tokorozawa, JP;

Tsuneta Sudo, Kodaira, JP;

Hiromi Maruyama, Gyoda, JP;

Shigeru Sugamori, Gyoda, JP;

Susumu Sumida, Gyoda, JP;

Masao Shimizu, Gyoda, JP;

Toshiaki Wakita, Gyoda, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
3401462 ;
Abstract

Reference logical data is spatially divided by a data dividing circuit for each time slot, and the divided data are converted into data, each having a continuous effective period. The divided and converted reference data and input logical data are compared by comparators to detect whether or not they are coincident with each other. A clock signal for determining the timing of comparison is also divided by a clock signal dividing circuit into n clock signals which are displaced one time slot apart in phase and occurring with a period of n time slots. By these divided clock signals those of the outputs from the comparators corresponding thereto are taken out from a comparison output circuit.


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