The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 1981
Filed:
Jun. 05, 1978
Pallab K Chatterjee, Dallas, TX (US);
Al F Tasch, Jr, Richardson, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An MOS read only memory, or ROM, is formed by a process compatible with standard silicon gate manufacturing methods. The ROM is programmed either after the top level of device interconnects has been patterned and sintered, usually the last step in the slice processing method before electrical testing of the devices, or after the electrical testing of the devices. All potential MOS transistors in the ROM array are initially at a logic '0' or a logic '1'. Selected transistors are programmed by implanting ions of the appropriate impurity type through their gates and gate oxides into the silicon, using photoresist as an implant mask. Impurities are electrically activated by laser annealing, and residual oxide charge is removed by rf plasma anneal.