The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 1981
Filed:
Jul. 10, 1979
Yasuo Kominami, Kokubunji, JP;
Masahiro Yamamura, Kodaira, JP;
Katsuji Mizumoto, Sayama, JP;
Toshihide Hanada, Sayama, JP;
Hitachi, Ltd., both ofTokyo, JP;
Pioneer Electronic Corporation, both ofTokyo, JP;
Abstract
A differential amplification is disclosed which comprises differential paired transistors. The direct bias current flowing in the differential paired transistors is determined by a constant current flowing from a first constant current circuit connected to the emitters of the differential paired transistors. The collector current of one of the differential paired transistors is caused to flow as an input current in a high-precision current mirror circuit. The current value of the constant current flowing in the first constant current circuit is set at 2Io. Since a direct base current Ib flows in the differential paired transistors, the current value of the collector current of one of the differential paired transistors is (Io-Ib). Accordingly, the high-precision current mirror circuit generates an output current of a current value of (Io-Ib) at the output terminal thereof. The differential amplification circuit includes a second constant current circuit having a current value Io corresponding to 1/2 of the current value of the constant current flowing in the first constant current circuit. A bias transistor is connected between the high-precision current mirror circuit and the second constant current circuit, and the direct base current Ib flows in this bias transistor. Accordingly, in the equilibrium state between the differential paired transistors, the output current appearing at the output terminal of the high precision current mirror circuit becomes zero, and the offset output current can be eliminated or moderated.