The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 1981

Filed:

Mar. 06, 1979
Applicant:
Inventors:

Gerard Nuzillat, Paris, FR;

Christian Arnodo, Paris, FR;

Assignee:

Thomson-CSF, Paris, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
427 84 ; 427 89 ; 427 93 ; 427 94 ; 427 99 ; 357 15 ;
Abstract

An integrated circuit and process for producing an integrated circuit. The circuit includes two interconnection layers, a lower layer being separated from the substrate by a thin dielectric layer, and separated from the upper layer by a thick dielectric layer, the interconnections between the two interconnection layers being situated outside the zone of the active elements of the integrated circuit. The circuit comprises active elements deposited for example on portions of an n-type layer supported by a substrate of semi-insulating gallium arsenide. Ohmic and Schottky contacts are connected either to the lower interconnection layer or to the upper interconnection layer. The thin dielectric layer is for example a silica layer whose thickness is less than 1,000 Angstroms, the thick dielectric layer having a thickness of 5,000 to 10,000 Angstroms.


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