Integrated circuits with built-in power supply protection

Abstract

To provide an integrated circuit with protection against overvoltage and overcurrent conditions, the channel of a field effect transistor is connected between the d.c. supply conductor for the integrated circuit and a further conductor for connection to one pole of a d.c. source for the circuit. The channel of the transistor is provided by a region of an epitaxial layer on a substrate of opposite conductivity type which provides a back gate for the transistor. A conductor is provided for connecting the substrate to the other pole of the d.c. source. The d.c. supply line voltage for the integrated circuit is thereby limited to the pinch-off voltage of the field effect transistor and the power supply current is limited to the zero gate-bias drain current of the field effect transistor. A protection arrangement also is disclosed for limiting forward current flow through an isolation diode in an integrated circuit resulting from accidental reverse polarity connection of a d.c. source to the circuit. The isolation diode is connected to the d.c. supply conductor only through a path including a current limiting resistor. A circuit combining both protection features also is described, the protection resistor connecting one end of the field effect transistor channel to the conductor for connection to the d.c. supply source to limit forward current flow through the diode junction between the transistor channel region and the substrate back gate region resulting from accidental reverse polarity connection of a d.c. source for the circuit.