The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 1981
Filed:
Dec. 15, 1978
Guenther K Machol, Saratoga, CA (US);
Jon L Cross, San Jose, CA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A programmable logic array (PLA) comprising a search array in which the logical AND of one or more inputs (product terms) is formed and coupled to a read array in which each output is formed from a logical OR of one or more of the inputs from the search array. The array has a plurality of output circuits and each output circuit comprises a plurality of physical gates (one gate for each product term input), a common drain diffusion, a load device and an output connection. A plurality of output circuits is formed in each column of the read array and, where circuits overlap so that they cannot be placed in the same column, they are placed in adjacent columns. Where a plurality of outputs share a common product term, gates driven by the same product term are placed in adjacent columns, where they are connected by metal to the common product term ouptut from the search array. The ability to take outputs from the top, side or bottom of the array and to take a plurality of outputs from each column of the read array minimizes the area required for the array and produces performance improvements in array operation.