The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 1980

Filed:

Aug. 09, 1978
Applicant:
Inventors:

Harry J Boll, Berkeley Heights, NJ (US);

Michael K Maul, Whitehouse Station, NJ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307353 ; 328120 ; 328151 ;
Abstract

This invention involves a detector circuit in MOS technology for sensing 'loss of clock'; that is, whenever a clock input voltage pulse source is interrupted or stops (becomes 'stuck') at any level, the output voltage of the detector circuit is at a high level, but is at a low level when the clock is working properly. Such a circuit is achieved by means of a first MOS electrical inverter (I.sub.1), connected for feeding its output to an MOS electrical differentiator (.DELTA.), connector for feeding its output to a thresholding MOS amplifier (A), connected for feeding its output to a unidirectional MOS current inhibitor (D), connected for feeding its output to a second MOS electrical inverter (I.sub.2), connected in parallel with a storage capacitor (C) in parallel with a leakage current source (J.sub.L), whereby the output of the second inverter is a binary indication of the presence vs. absence of clock pulse input to the first inverter.


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