The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 1980

Filed:

Dec. 12, 1978
Applicant:
Inventor:

Kenneth N Rockwell, Yorba Linda, CA (US);

Assignee:

Thomas & Betts Corporation, Raritan, NJ (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; G06F / ;
U.S. Cl.
CPC ...
371 25 ; 324 51 ; 324 / ; 364580 ; 371 20 ;
Abstract

High speed solid state apparatus is described for learning, testing and monitoring the assembly of multiconductor harnesses. Testing a harness having a very large number of end points within the matter of a few seconds is made possible through the employment of plural high speed scanning means which operate independently of one another and simultaneously scan groups of points to identify both continuity and open circuit conditions. During a learning mode, all short circuit and open circuit conditions of a known good harness are transferred into high speed memory means. Said plurality of scanning means examine all points relative to a preselected point during a scan cycle, repeating scan cycles for every point to be tested. Data representative of the detected interconnections are transferred to memory when all of said plural scanning means have completed the scan for said preselected point. The system provides for: learning the connections of a known good harness and storing data representative of the connections in high speed memory; high speed testing of completed harnesses by examination of the harness at high speed to ascertain the interconnections and comparing interconnections against the data stored in memory; and monitoring the assembly of a cable to provide direct indications of an incorrect connection, as well as having a capability of permanently latching a momentary fault condition for purposes of localizing the spurious condition.


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