The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 1980

Filed:

Feb. 22, 1977
Applicant:
Inventors:

Adrianus M de Bijl, Beekbergen, NL;

Hans Cramwinckel, Beekbergen, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
364200 ;
Abstract

A Computer system which includes a central processing unit, a central memory storage unit and a plurality of peripheral devices, the central processing unit having a control unit for dividing single complete input/output instructions for the transfer of data within the system into a sequence of discrete, separately executable, time independent operation instructions under the control of a microprogram. The system further includes peripheral device control units for the control of the independent execution of the discrete divided input/output (I/O) operation instructions. A microprogram command line is connected to the control unit in the central processing unit for controlling the output of the discrete I/O operation instructions along the system bus. An interruption request unit is also included within each of the peripheral device control units for generating an interrupt in the central processing unit after the termination of an operation instruction, both to permit the updated status of instructions to be recorded and to indicate the availability of a specific I/O device for further use. After the control unit in the central processing unit divides single complete input/output instructions into a plurality of separate operation instructions for operation steps which relate to particular functional characteristics of the peripheral devices in the system, the peripheral device control units control the individual execution of each separate operation in a specific sequence but independently of each other in time within that sequence. The individual data operations are transferred over the bus of the system.


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