Sewing machine with stitch-pattern control circuitry

Abstract

The stitch-control-signal outputs of a first memory are connected to the inputs of stitch-forming instrumentalities via an intermediate second memory. One of the two memories is a static memory which is read out by applying to the address signal inputs thereof a series of next-address signals derived from the signals produced at the output of that memory. Both memories may be static memories whose read-out is performed in that way. Alternatively, the intermediate memory may be a sequential-access dynamic memory, such as a shift register, whose read-out is effected by a train of indistinguishable shift signals. In the latter event, the read-out of the first memory is effected by applying to the address-signal inputs thereof a series of next-address signals derived from the output signals of the first memory and not performed in synchronism with machine operation, whereas the read-out of the dynamic sequential-access second memory is performed in synchronism with machine operation but without addressing codes and instead by trains of indistinguishable signals. The information read out from the intermediate second memory is written into it either from the first memory or alternatively from an external pattern data reader, such as a perforated-tape reader.