The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 1980
Filed:
Sep. 01, 1978
Applicant:
Inventors:
Wayne J Lewis, Escondido, CA (US);
William P Ward, Poway, CA (US);
Assignee:
NCR Corporation, Dayton, OH (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 37 ; 3401 / ;
Abstract
A data processing system implemented in LSI includes error detection and correction (EDC) circuits operating either in an error correction code (ECC) mode by generating ECC parity bits, or a byte parity mode by generating or checking byte parity bits. Each EDC circuit is identical and is capable of delivering identical control signals to byte sliced memory interface chips for purposes of error correction. The EDC circuits may be used individually with a 32 bit data bus or may be combined for use with a 64 bit data bus.