Buffered high frequency plasma display system

Abstract

A plasma discharge display device is operated at a high frequency above the response range of the inherent wall charge storage phenomenon and utilizes a refresh buffer. The vertical drive selection includes a pair of shift registers operated in parallel into which data from the host or associated controller is loaded, with an individual driver associated with each register stage. The horizontal lines are addressed through associated shift registers in an even-odd interlace sequence to generate a display on a horizontal scan basis. The horizontal drivers are referenced at the level and frequency of the high frequency energizing signals, while the vertical drivers are selectively set to ground or a positive a.c. voltage according to the state of associated register cells. By using the high frequency signal in the horizontal axis as a floating reference and unique selection techniques, the display is operated by low voltage signals. The normal sustain and erase operations associated with conventional plasma discharge devices are eliminated, while the write operation does not require either the precise timing or logical considerations associated with the selective operation of conventional plasma discharge display devices. The low voltage drive requirements permits use of low voltage driver circuitry which is susceptible to low cost monolithic fabrication techniques.