The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 1980
Filed:
Apr. 20, 1978
Steven Morrison, Baltimore, MD (US);
Thomas K Lisle, Jr, Baltimore, MD (US);
Clarence C Glover, Baltimore, MD (US);
Abstract
An automatic bias adjustment circuit for a successive ranged analog/digital converter (SRADC) that eliminates the need for manual bias adjustments and calibration inputs. The bias correction circuit comprehends dual flip flops that are triggered by selected comparators of the SRADC n bit parallel analog/digital converter. The flip flop output signals control up/down counters whose output bits drive digital/analog converter. The digital/analog converted signals are introduced back into the SRADC analog chain to zero bias errors in a particular sub-range. A disabling circuit prevents operation of the bias adjustment circuits for the first sub-range.