The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 1980
Filed:
Sep. 05, 1978
James W Bond, San Diego, CA (US);
Gary A Dressel, San Diego, CA (US);
The United States of America as represented by the Secretary of the Navy, Washington, DC (US);
Abstract
Apparatus, useful in signal processing, and which can be used for modulo (2.sup.n -1) addition, subtraction, coding, and decoding, has a plurality of 2n input means: n means for receiving a signal I.sub.0, I.sub.1, . . . , I.sub.n-1, and another n means for receiving a signal J.sub.0, J.sub.1, . . ., J.sub.n-1. A pluraity n of means, connected to the n I signal input means, may switch each input means so that it is connected alternately into one of two connecting points, a first and a second connecting point. A plurality n of means is connected to the n first connecting points, for inverting the polarity of a signal received at its input, the output of the inverting means being connected to its associated second connecting point. A plurality n of three input adding means, has one input connected to the output of the inverting means, and another being connected to an associated means for receiving a J signal, the means adding the two inputs. The plurality n of adding means are circularly connected to each other, by a third input in the manner of a full adder. Means, having its n inputs connected to the n adding means, add the n-inputs in an AND manner. A second means, whose input is connected to the output of the n-input adding means, inverts the signal at its input. A plurality of two-input means has one of its inputs connected to the output of one of the plurality of n adding means, the other input being connected to the output of the second-named inverting means, the output being the required decoded signal.