The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 1980

Filed:

Feb. 08, 1978
Applicant:
Inventors:

Gilles J Bottard, Paris, FR;

Michel Henry, Louvres, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
235304 ; 3403 / ;
Abstract

Apparatus is disclosed for cumulative summing and compressing data items each of which is comprised of b binary elements. The summing and compressing apparatus is associated with control means to process each data item in a cumulative summing and compression cycle, and is comprised of an input buffer register which is designated to store a data item to be processed at the beginning of each cycle, a set of n intermediate registers occupying serial positions 1 ot n each of which has b storage locations, an adder circuit, an output buffer register made up of n sections having b storage locations, and transfer circuits which are connected to the control means, which produces a succession of control signals for successively interconnecting (1) the registers in serial positions 1 to (n-1) and the input buffer register, to the adder circuit in order to add the contents of the (n-1) registers and the data item to be processed at the beginning of each cycle and to transfer the result of this addition to the input buffer register; (2) the registers in serial positions 2 to n, to the registers in serial positions 1 to (n-1)in order to transfer the content of each of the registers in serial positions 2 to n to the register which precedes it in the order given, (3) the register in serial position n and the input buffer register, to the adder circuit in order to add the contents of these registers and to transfer the result of this addition to the register in serial position n, and (4) the registers in serial positions 1 to n, in parallel to respective ones of the n sections of the output bufrer register in order to transfer the contents of the n registers to the output buffer register so that, at the end of an N.sup.th cumulative summing and compression cycle, the contents of the output buffer register is a data item which has been compressed from a set of N data items which have been processed by the apparatus in N accumulation and compression cycles. The invention is particularly concerned with locating a failure occurring in a data processing unit by determining a symptom which is the result of accumulation and packing a series of partial symptoms.


Find Patent Forward Citations

Quick Actions:

Bottard, Gilles. (1980). Data accumulation and compression apparatus (U.S. Patent No. 4185190). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4185190

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…