The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 1979
Filed:
Oct. 04, 1977
Bipin D Parikh, Cambridge, OH (US);
Haresh C Patnaik, Cambridge, OH (US);
Bhagubhai K Patel, Cambridge, OH (US);
Prabodh M Dharia, Des Plaines, IL (US);
John J Kurtz, Cambridge, OH (US);
Alfred D Jenkins, Cambridge, OH (US);
Prakash Y Mahajan, Cambridge, OH (US);
NCR Corporation, Dayton, OH (US);
Abstract
Communications between processor terminals are carried out through the use of communication adapters. Each adapter receives selected control signals for transmitting or receiving data over a serial communication link to or from a remote terminal. The transmission portion of an adapter includes pretransmission control circuitry which receives control signals and stores transmission control signals which are used to control the format and serial transmission of a frame of data to a remote terminal. Each frame of data is begun and terminated with a uniquely encoded flag byte. Following the first flag byte are successive address and control fields. An optional information field may follow the control field and may include encoded information designating a dynamic change in the byte size of the data. Immediately following the information field, a frame check sequence field, generated in accordance with the contents of each of the address, control, and information field, is transmitted, followed by a frame terminating flag byte. In order to enable the adapter to receive a serial data stream from a remote terminal and couple this received data to its assoicated processor, the adpater includes pre-reception control and direct memory access control circuitry coupled over the common control bus to the common control module and its associated memory. Upon completely disassembling a frame, the adapter generates appropriate status signals and an interrupt is supplied to the common control.