The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 1979
Filed:
Jul. 08, 1977
Applicant:
Inventors:
Jack L Anderson, Scottsdale, AZ (US);
Frank J Swiatowiecz, Tempe, AZ (US);
Marvin A Glazer, Tempe, AZ (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
3401 / ; 307207 ; 307209 ;
Abstract
A dual function capability is incorporated into one input of an emitter coupled logic gate to allow a user to selectively enable the logic circuit to operate in a multifunction mode. The dual function input can recognize both normal binary voltage levels and operate as a conventional input for digital information, and also recognize voltage levels not within the normal binary voltage levels and modify the circuit function correspondingly.
Anderson, Jack. (1979). Logic circuits incorporating a dual function input (U.S. Patent No. 4167727). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4167727
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile