The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 1979
Filed:
Nov. 07, 1977
Robert B Malcolm, Scottsdale, AZ (US);
Clarence E McDaniel, Wichita Falls, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A standardized large scale integrated (LSI) array of standard logic cells on a single complementary metal oxide semiconductor (CMOS) chip. The pattern chosen for the layout of the standard logic cells provides very high cell density and, in combination with the 'roadways' provided for power and data interconnects and the availability of 'cross unders' within any cell chosen, very high utility ratios of the available cells. The standardized logic chip may be used to implement a large variety of logic circuit designs by the simple expedient of a single custom mask design for the metallization pattern for each unique use.