Controllable rectifier circuit for a power supply

Abstract

A controllable rectifier circuit which may be used in a power supply selectively produces a half-wave or a full-wave rectified signal. The rectifier circuit includes a pair of input terminals for receiving an AC signal and a bridge rectifier coupled to the input terminals and including a pair of output terminals across which a rectified AC signal is produced. The bridge rectifier comprises a first current path including a switchable rectifier for conducting positive half cycles of the AC signal and a second current path including a switchable rectifier for conducting negative half cycles of the AC signal. A pulse generator is supplied with reduced amplitude versions of the positive and negative half cycles of the AC signal, in sequence, to produce an output pulse when the reduced amplitude of the half cycle supplied thereto is less than a predetermined level. A non-reduced half cycle of the AC signal is selectively supplied to the pulse generator to prevent the pulse generator from generating an output pulse during that half cycle so that an output pulse is generated only during the beginning and ending portions of the other half cycle. The generated output pulses are supplied to each of the switchable rectifiers, whereby the bridge rectifier rectifies both half cycles of the AC signal when the non-reduced half cycle is not supplied to the pulse generator, and the bridge rectifier rectifies only the other half cycle of the AC signal when the non-reduced half cycle is supplied to the pulse generator.