The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 1979

Filed:

Jan. 03, 1978
Applicant:
Inventors:

Donald G Grice, Kingston, NY (US);

David F Johnson, Saugerties, NY (US);

Arnold Weinberger, Poughkeepsie, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364787 ;
Abstract

This specification discloses a multi digit binary adder embodied in programmable logic arrays (PLAs). The particular programmable logic array used here has a separate two bit decoder for receiving each like order pairs of digits A.sub.i, B.sub.i of two n digit binary numbers A.sub.0, A.sub.1....A.sub.n-1 and B.sub.0, B.sub.1....B.sub.n-1 plus a carry C.sub.in. The decoders generate an output signal called a min term on a different line for each of the four possible combinations A.sub.i B.sub.i, A.sub.i B.sub.i, A.sub.i B.sub.i and A.sub.i B.sub.i of the true and complement of each pair. The min terms from the decoders are fed to an array called the product term generator or AND array which generates product terms


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