The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 1979

Filed:

Apr. 11, 1977
Applicant:
Inventor:

Farooq M Quadri, San Diego, CA (US);

Assignee:

Burroughs Corporation, Detroit, MI (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 12 ; 365 15 ; 365 41 ;
Abstract

An associative magnetic domain memory comprising; a predetermined number of storage loops having a predetermined number of magnetic elements on which domains circulate, said domains or absence of said domains on said magnetic elements in said storage loops representing bits of binary information; write-in section and read-out means disposed relative to said storage loops; said write-in section including, generator for generating bits and propagating said bits to positions adjacent said storage loops as a set of bits with a subset of said bits representing address bits and the rest of said set being data bits, and a gate for transferring said set of bits into said storage loops for storage therein; said read-out section including a replicator for forming replicas of sets of bits in said storage loops, a gate for transferring said replica sets one at a time, a sensor for receiving and sensing said transferred replica sets if one of said address bits does not match the desired address criteria. A plurality of similar memories are arranged in parallel with the replica address bits of each subset from each memory sensed as a row and an association performed on a plurality of address bit criteria. As before, the associative process will continue until there is a complete match of all the replica address bits with all the address criteria at which time the replica data associated with each of the replica address bits is read out.


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