Testing the differential response times of a plurality of circuits

Abstract

In integrated circuits having multiple gate functions, the difference between the propagation delay times of each of the gate functions is often important in that it affects the reliability of the circuits. To determine these delay differences, input signals are applied simultaneously to the multiple gate functions. The output signals of the gate functions are monitored, and a reference signal is generated at the time of sensing the first output signal. This reference signal is indicative of the fastest propagation delay time. A delay time equal to the maximum allowable differential delay time between the fastest propagation delay time and the slowest propagation delay time is added to the reference signal. The delayed reference signal is then compared with the gate function propagation delay time to determine if any of the gate function delays are longer. If any of the gate function delays are longer, this indicates that the delay of the particular gate function is greater than the fastest propagation delay time by an amount larger than the maximum allowable difference.