The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 1979

Filed:

Apr. 13, 1978
Applicant:
Inventor:

James J Remedi, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365203 ; 365 51 ; 365103 ; 307238 ;
Abstract

A read-only-memory is provided on a semiconductor chip having a reduced number of power supply lines. The memory has a plurality of storage cells arranged in an array. Vertical lines define columns of the memory. Every other vertical line is coupled to a first node. The first node is controllably coupled to a first voltage potential to controllably precharge the first node. The vertical lines not connected to the first node are connected to an output node. P channel field effect transistors are used to couple the vertical lines to the first node and to the output node. A plurality of N-channel field effect transistors controllably couple the vertical lines to a second voltage potential. A vertical line on one side of the column of memory cells is used to provide a precharge voltage to the cell while a vertical line on the other side of the column of memory cells is used to conduct stored information from the cell to the output node. The vertical lines are shared by adjacent columns of memory cells thereby reducing the number of power supply lines.


Find Patent Forward Citations

Loading…