Fault tolerant bubble memory with redundancy using a stationary register

Abstract

In a field access type bubble memory system using a major loop-minor loop organization, additional redundant minor loops are included in each memory chip so that defective minor loops may be discarded and the memory retain its nominal capacity. Thus, the total number of minor loops is in excess of the nominal capacity. A stationary register is placed adjacent to and parallel to a major loop and has as many register positions as the total number of minor loops on the chip. An appropriate binary code identifies in the appropriate register location the corresponding minor loop which is defective, including nominally defective minor loops, if necessary, so that a number of minor loops equal to the nominal capacity of the memory are identified as good. Each time the memory is accessed, the contents of the register are accessed, nondestructively, and read into and merged with the contents of the major loop on an every other one basis. Appropriate logic identifies on an every other one basis which minor loop is to receive data and from which data can be read.