The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 1979
Filed:
Oct. 12, 1976
Raymond Henry, Paris, FR;
Jean-Victor Bouvet, Paris, FR;
Thomson-CSF, Paris, FR;
Abstract
A process intended for avoiding the 'flip chip bonding' technique, well known for planar diodes, is provided. It is further applicable to mesa diodes and planar transistors. It comprises an essential step: the lapping of the substrate up to reduce its thickness to the same order of magnitude as the upper active layer of a semiconductor device, thus facilitating the cooling of the device through the substrate towards a heat sink. This essential step is made possible by virtue of a preliminary bonding on the upper layer of the semiconductor device of a block of silicon. According to a first alternative of the invention the block is finally eliminated and the device is a conventional one with a very thin substrate. According to a second alternative of the invention, the block is retained and lapped after addition of the heat sink, then metalized to provide a secondary way to the thermal flux.