The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 1979

Filed:

Jun. 13, 1977
Applicant:
Inventor:

Angus McLagan, Newport Beach, CA (US);

Assignee:

General Automation, Anaheim, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364200 ;
Abstract

A multiprocessor system is described in which a plurality of central processor units share the same main memory over a common asynchronous bus. Each central processor directs all memory requests to its own high speed cache memory. If the request is to read data from memory, the cache memory control determines if the addressed data is present in the cache memory. If so, the data is transferred to the processor without accessing main memory over the bus. If the data is not present in the cache memory, the cache memory control gains access to the bus by a priority circuit and reads out the data from memory, storing the data in the cache memory at the same time that it transfers the data to the processor. If the memory request by the processor is to write data in memory, the cache memory control gains access to the bus and initiates a data store in the main memory. At the same time, the cache memory control determines if the existing data being overwritten at the addressed location in main memory is present in the cache memory. If so, it updates the data in the cache memory at the same time it writes the data in main memory.


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