The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 1979

Filed:

Apr. 27, 1977
Applicant:
Inventor:

John W Miller, Toledo, OH (US);

Assignee:

Owens-Illinois, Inc., Toledo, OH (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05B / ; H05B / ; H05B / ;
U.S. Cl.
CPC ...
340777 ; 340805 ; 3151694 ;
Abstract

A method and apparatus for operating a gas discharge display/memory panel having a pair of opposed electrode arrays. A pulsating potential sustainer wave form is applied to one electrode array while the other electrode array is maintained at the reference potential of the sustainer wave form, typically the system ground potential. The potentials are applied to the electrodes through switching circuits individual to the electrodes, each circuit including a normally turned on MOSFET and a feed through diode. The MOSFET and the diode are oppositely poled and connected in parallel between the potential sources and the associated electrode. When a cell is addressed, either written or erased, the MOSFETs in the switching circuits connected to the one electrode array are turned off except for the MOSFET connected to the electrode of the selected cell and the MOSFET in the switching circuit for the other electrode array connected to the electrode of the selected cell is turned off while an address pulser for each electrode array is turned on to apply partial select address voltage pulses to the selected cell. During this addressing, the electrodes of the one electrode array are clamped at a predetermined potential and the selected electrode of the other array can have a keyer pulse voltage applied thereto to improve the addressing of the cell.


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