The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 1979
Filed:
Jun. 30, 1977
Noriji Sakashita, Hamamatsu, JP;
Hiroshi Kitagawa, Hamamatsu, JP;
Kabushiki Kaisha Kawai Gakki Seisakusho, Hamamatsu, JP;
Abstract
A key code generator for electronic musical instruments which has a switch matrix circuit having a plurality of switches disposed at the intersections of two sets of buses, means for simultaneously applying signals to the switch matrix circuit from one of the two sets of buses to derive outputs from a plurality of blocks into which the buses of the other set are divided line by line, a memory for detecting the blocks that even one switch is in the on state from the bus outputs of the switch matrix circuit and temporarily storing signals of the detected blocks, a first priority selector for selecting block signals in a predetermined order of priority from the bus outputs and sequentially outputting the block signals with a predetermined clock pulse, means for inhibiting the block detecting operation during outputting from the first priority selector and applying the selected block signals to the buses of the detected blocks to sequentially scan only the detected blocks, a second priority selector for selecting switch signals in a predetermined order of priority from respective switch signals of the scanned blocks and sequentially outputting the switch signals with a predetermined clock pulse, and means for preventing clock pulses from inputting to the first priority selector until the switch signals of each designated block are all outputted.