Circuit for testing high frequency current amplifying capability of

Abstract

A transistor test circuit provides for the selection of preferably three widely differing test frequencies for testing transistors normally having respectively relatively small, intermediate and large frequency gain-bandwidth product characteristics. These test frequencies are each much greater than the assumed normal cut-off frequency of the transistors to be tested thereby, and preferably only a fraction of the frequency at which the current gain of normal transistors would decrease to one. The test circuit is designed to form a linear amplifier circuit with the transistor under test and is provided with an automatic base drive control circuit which provides a substantially fixed predetermined DC collector current, despite wide variations in the current gain between different transistors being tested. The circuit further includes an indicating means for displaying the product of the selected test frequency and the current gain of the transistor under test, as indicated by the amplitude of the amplified test frequency signal in the collector circuit of the transistor under test.