The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 1978
Filed:
Jun. 22, 1977
Applicant:
Inventors:
Thomas M Frederiksen, San Jose, CA (US);
James B Cecil, Santa Clara, CA (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307264 ; 307208 ; 307251 ; 307297 ; 307315 ; 307D / ;
Abstract
The invention described herein is an interface circuit which effectively allows TTL output voltages to fall within the range of CMOS input thresholds. The interface circuit contains bipolar and FET devices connected to generate an input voltage threshold which is equal to two base-emitter voltage drops. The interface circuit also includes a switching circuit portion which comprises one P-channel MOS transistor connected to one N-channel MOS transistor.