Ignition system with idle speed governor apparatus

Abstract

An alternator driven capacitive discharge ignition system includes a tachometer circuit monitoring the speed-dependent repetition rate of discharge at an internal trigger power supply, the tachometer circuit causing the triggering threshold bias to be reduced below idle speed to electronically advance the timing. The ignition circuit includes a triggering threshold bias capacitor in series the trigger pulse source and a trigger power supply having a pilot capacitor to alternately fire a pair of ignition silicon controlled rectifiers. The pilot capacitor is charged in series with an RC filter network of a 'bucket' tachometer circuit to create a speed signal voltage proportional to engine speed with the pilot capacitor functioning as the bucket capacitor. The speed signal is a voltage which is positive relative to a common signal ground while the threshold bias capacitor voltage is negative relative to such signal ground. The speed signal is applied to the gate of a P-channel depletion-mode junction field-effect transistor (JFET). The source-to-drain channel of the transistor is connected in parallel with the threshold bias capacitor. Below a selected idle speed, the source-to-drain channel resistance provides a maximum bleed current to the threshold bias capacitor, thereby reducing the triggering threshold voltage and creating an automatic spark advance. As the engine speeds up, the source-to-drain resistance increases and virtually eliminate the bleed current at speeds slightly above idle.