The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 1978

Filed:

Sep. 14, 1977
Applicant:
Inventors:

Ruediger Hofmann, Munich, DE;

Paul-Werner Von Basse, Wolfratshausen-Farchet, DE;

Assignee:

Siemens Aktiengesellschaft, Berlin & Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365230 ; 307205 ; 307D / ;
Abstract

A system is disclosed for addressing a MOS store containing MOS transistor storage cells. Address signals are amplified, inverted and intermediately stored. Negated and non-negated address signals are fed to a decoder circuit connected by drive lines to the storage cells. The decoder circuit selects a drive line depending upon the prevailing address signals. The decoder circuit is provided as a preliminary decoder circuit and a post decoder circuit. The preliminary decoder circuit has a plurality of stages wherein each stage is supplied with address signals in negated and non-negated form. Output lines of the preliminary decoder stages are connected to the post decoder circuit. Drive lines connect the storage cells to the post decoder circuit. Logic linking elements are provided in the post decoder circuit for logic linking these drive lines to the output lines of the preliminary decoder stages.


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