The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 1978

Filed:

Feb. 25, 1977
Applicant:
Inventors:

Takashi Shimada, Yamato, JP;

Kenichi Inoue, Kawasaki, JP;

Takaji Ohtsu, Hatano, JP;

Hidenobu Mochizuki, Atsugi, JP;

Jiro Yamaguchi, Yokohama, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 23 ; 357 54 ; 357 55 ;
Abstract

In a memory type insulated gate field effect semiconductor device including a semiconductor layer of one conductivity type, a source region of the opposite conductivity type formed in the surface of the semiconductor layer, a drain region of the opposite conductivity type formed in the surface of the semiconductor layer, a gate insulating layer affixed to the surface of the semiconductor layer, and a gate electrode deposited on the surface of the gate insulating layer, the gate insulating layer has a pair of thick gate guarding portions which exist on side of the source and drain regions, and a thin memory portion intermediate between the thick gate guarding portions, and a surface impurity concentration per square centimeter of the semiconductor layer under the thick gate guarding portions is different from a surface impurity concentration per square centimeter of the semiconductor layer under the tin memory portion. The voltage difference between the threshold voltages of the semiconductor device at the memorized state and at the non-memorized state can be increased, and the read-out voltage of the semiconductor device can be reduced. The circuit design is simplified.


Find Patent Forward Citations

Loading…