The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 1978
Filed:
Sep. 20, 1976
Dennis Joseph Lynes, Madison, NJ (US);
Peter Theodore Panousis, Salisbury Township, Lehigh County, PA (US);
Robert Leonard Pritchett, Bath, PA (US);
Bell Telephone Laboratories, Incorporated, Murray Hill, NJ (US);
Abstract
A semiconductor read-only-memory (ROM) unit fabricated in large-scale-integrated form utilizing the formation of self-isolating bit-line surface regions of one conductivity type directly in a bulk region of the opposite conductivity type. Channel-stop regions of the same conductivity type as the bulk region are formed in the spaces between bit-line regions. Metallic word-lines overlying and orthogonal to the bit-line regions are formed, separated from the bit-line regions by an insulating layer. The memory cell comprises a single Schottky diode. Such a diode is made or not at each word-line/bit-line crossover location depending respectively on whether or not an aperture is formed in the insulating layer during fabrication to permit the word-line to contact a lightly doped portion of the bit-line. ROM units formed by this method are characterized by small area, high speed, low power dissipation and low cost.