Data processor with read-only-memory processor and partial solution

Abstract

A data processor such as a programmable logic controller utilizes a read-only-memory boolean logic processor for generating solutions to complex boolean equations. The read-only-memory processor includes a plurality of address inputs for selectively addressing memory locations thereof in accordance with applied boolean data and multi-bit instructions. The contents of the addressed memory location represents the solution or partial solution to a boolean equation. A memory, in the form of a push-down stack reversible serial storage means, is coupled to the output of the processor for receiving and storing the single-bit partial solutions, and is coupled to an address input of the processor for transferring partial solutions stored therein to the processor means for further processing. The partial solutions are stored in the reversible storage means in a predetermined order and are transferred from the reversible storage means to the address input of the processor means for further processing in the reverse of said predetermined order.