The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 1978
Filed:
Feb. 03, 1977
Robert W Bierig, Sudbury, MA (US);
Raytheon Company, Lexington, MA (US);
Abstract
A fusing technique whereby a fuse is fabricated upon a substrate by integrated circuit techniques. Three or more layers of chemically dissimilar metals are deposited upon the region where the fuse is to be formed. The top layers are then etched away from the region where the fusible link is to be formed leaving the lower two layers, the top one of which forms the actual fusible link. The lower layer is then etched away leaving the fusible link suspended from the underlying substrate. The current necessary to cause such a fuse to blow is consistent from fuse to fuse since the physical dimensions of the fusible link can accurately be controlled with the integrated circuit techniques used and, since the fusible link is not in contact with the substrate, the rate at which heat is conducted away from the fusible link cannot vary from fuse to fuse. The method is used to advantage in microwave power and oscillator diode circuits such as those used in phased array radar systems and in read only memories and memory reconfiguration applications, as well as other semiconductor fusing applications.