The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 1978
Filed:
Apr. 08, 1977
Takashi Takezono, Kawasaki, JA;
Takashi Kanie, Tama, JA;
Fujitsu Limited, Kawasaki, JA;
Abstract
A module array has a plurality of memory modules, each having at least one memory cell, arranged in a matrix of m rows and n columns. An address input provides row addresses for each column of the array from outside the memory apparatus. Address modification devices for each column of the module array modify the row addresses provided for each column of the array to provide new addresses. Address decoders in the array are connected to the address modification devices for selecting the modules of each column of the array, one by one, in accordance with the new addresses. A module state indicator in the array is connected to the address decoders and has memories of at least one bit corresponding to each module of all the rows and all the columns of the array, except one border column for indicating the good or defective condition of each module when accessed at the time the module is accessed. A module selector is connected to the module state indicator and to the array for selecting only a specified number of good modules from n modules accessed simultaneously according to the indication of the module state indicator. Input-output devices are connected by the module selector to the good modules selected by the module selector.