Digital system for stabilizing the speed of a clockwork motor

Abstract

An energizing circuit for an electric motor, driving a clockwork of a timepiece, includes a stator coil coacting with one or more magnet pairs on an associated rotor whose periodic alignment with the coil induces therein a train of monitoring pulses with a frequency proportional to the motor speed. The monitoring pulses are amplified and fed back to the coil, as driving pulses, through a coincidence gate which is opened or closed under the control of a speed-sensing network including a crystal-controlled oscillator whose output wave, stepped down in a frequency divider, is a series of timing pulses fed to a pulse counter which is reset by the monitoring pulses and whose count, therefore, varies inversely with the motor speed. Through a logic circuit and a pair of cascaded flip-flops, the transmission of driving pulses to the coil is inhibited when the count falls short of a lower limit -- indicative of excessive motor speed -- but is allowed to proceed when the count surpasses an upper limit representing an insufficiently low speed. In the range between these two limits, the counter blocks or unblocks the transmission of a driving pulse in dependence upon the relative phasing of the monitoring pulses from the motor and a sequence of reference pulses of fixed cadence, equal to a fraction of the timing-pulse frequency, derived from the frequency divider. The monitoring pulses and the reference pulses are supplied through an anticoincidence network, including a pair of binary memories, to a reversible pulse counter delivering a phasing signal to the logic circuit.