Divider using carry save adder with nonperforming lookahead

Abstract

A carry save adder (CSA) is adapted for use in dividing operations by providing it with a lookahead capability whereby it accurately predicts whether or not each of the proposed complemental subtractions in a division process could be successfully performed if actually attempted, and it actually performs only those subtractions that will not result in overdrafts. Each bit position of the carry save adder is arranged to receive sum, carry and data inputs and to furnish sum, carry, presum and precarry outputs. The sum and carry output bits are latched and remain undisturbed until the next complemental subtraction is performed. The presum and precarry bits are not latched and are fed into a lookahead logic network which analyzes the presum and precarry bit patterns derived from all of the CSA bit positions to determine rapidly by a logical trial procedure whether the divisor could be subtracted from the dividend or partial remainder value currently registered in the sum and carry latches of the CSA without causing an overdraft. While this trial procedure is in progress, the presum and precarry values may change without altering the latched sum and carry values. If the trial procedure indicates that a proposed complemental subtraction would be unsuccessful, then such subtraction will be skipped without actually being performed by the CSA, thus eliminating the necessity of determining whether overdrafts have occurred and correcting the overdrafts.