The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 1978
Filed:
Jan. 03, 1977
Applicant:
Inventor:
Homer Warner Miller, Peoria, AZ (US);
Assignee:
Honeywell Information Systems Inc., Phoenix, AZ (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364738 ;
Abstract
A current mode arithmetic logic circuit utilizes a unique combination of a 4-bit and a 5-bit arithmetic logic unit for performing parity prediction and parity checking on an n-bit byte plus parity, in addition to performing 16 binary or 16 Boolean operations on two n-bit plus parity bytes.