Process for suppressing parasitic components utilizing ion implantation

Abstract

A process for suppressing parasitic components, in particular parasitic diodes and transistors, in integrated circuits which have, in particular, inversely operated transistors, in which a semiconductor substrate of the first conductivity type as introduced therein a highly doped zone of a second conductivity type which is opposite to the first conductivity type and which extends to a surface of the semiconductor substrate. A semiconductor layer of the second conductivity type is epitaxially deposited on the surface and the semiconductor layer further has produced therein zones of differing conductivity type which form at least one component which is electrically insulated from adjacent components. Prior to the deposition of the semiconductor layer, at least one highly ohmic layer and/or a layer having a high density of recombination centers is introduced by ion implantation into the surface of the semiconductor substrate at points suitable for the suppression of the parasitic components which form subsequently due to the production of the zones of differing conductivity type in the semiconductor layer.