The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 1978

Filed:

Jun. 30, 1976
Applicant:
Inventors:

Charles John Kircher, Yorktown Heights, NY (US);

Hans Helmut Zappe, Granite Springs, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
29625 ; 427 63 ; 2957 / ; 307245 ;
Abstract

A fabrication method for integrated circuits is disclosed wherein a structure is formed on one side of a supporting substrate which provides a ground plane with 'X' wiring on one side and 'Y' wiring on the other side thereof. The method includes a number of alternative initial planarization steps which permits the resulting device to be substantially planar, thereby allowing it to be used as a substrate for preparation of high density integrated circuits. A first planarization step includes the deposition of a niobium thin film on a doped silicon substrate; the delineation of the desired niobium 'X' wiring pattern using well-known photolithographic and etching techniques, leaving the photoresist in place to protect the niobium; the anodization of exposed silicon substrate portions to form silicon dioxide surrounding the niobium to a higher level than the niobium; and the removal of the photoresist.


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