The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 1977

Filed:

Mar. 26, 1976
Applicant:
Inventors:

Paul J Kristof, Fort Atkinson, WI (US);

Frederick A Rose, Fort Atkinson, WI (US);

Assignee:

Norland Corporation, Fort Atkinson, WI (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J / ; G01R / ;
U.S. Cl.
CPC ...
364487 ; 3241 / ; 324 / ;
Abstract

A waveform measuring and analyzing instrument includes a digital memory unit which stores the waveform data as a fixed point number. The waveform is typically digitized as an eight or ten bit number and stored in a slightly wider array of memory locations, typically twelve bits wide. A block multiplier register and a block offset register store floating point numbers, typically thirty-two bits wide. Each register stores a number common to all data locations in memory, such that the variable or most significant character of the data is now represented over the maximum width of the memory data word. A processor applies the modifying offset and multiplier words or numbers to each memory data word whenever the data word is employed in any data reduction and whenever the data word is read for display. The combination of the two floating point modifying or scaling numbers allows use of relatively narrow storage words and the manipulation of the waveform data by the processor without significant loss of precision. The display of the variable portion of data may then be expanded and presented over a maximum scale for meaningful visual presentation. The memory unit is preferably constructed with a plurality of arrays for separate and combined data acquisition and display. In such a system, each array includes a set of the block modifying registers, including a multiplier register and an offset register. Where the individual arrays can be combined to form a new array, one of the register sets for the individual arrays may be assigned as the modifier for the combined array or the individual sets may be used for each array forming the new array.


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