The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 1977
Filed:
Nov. 12, 1976
Gerard Jean-Marie Delarue, Antibes, FR;
Michel Paul Verhaeghe, Vence, FR;
International Business Machines Corporation, Armonk, NY (US);
Abstract
An improved wideband frequency multiplier characterized as follows: a saw-tooth signal generator supplying a saw-tooth wave having a frequency equal to the frequency to be multiplied, the level of the voltage wave varying between a reference level and a maximum which is related to the frequency to be multiplied; storage means for storing a voltage equal to, or closely approaching the maximum voltage value of the saw-tooth wave; a voltage divider having several outputs, each of which provides an output which is a given fraction of the stored voltage; a number of comparators each of which corresponds to and is coupled to an output of the voltage divider, each comparator comparing the instantaneous value of the saw-tooth voltage with the voltage supplied by the corresponding output of the voltage divider, and supplying a first level signal when said instantaneous value is lower than the voltage supplied by said corresponding output, and a second level signal when it is higher; and logical circuits combining the signals supplied by the comparators so as to give an output signal the frequency of which is a given multiple of the frequency of the saw-tooth signal. A timing circuit for a badge reader, or the like where the data is magnetically NRZ recorded on, or in, the badge, or the like. The timing circuit employs a frequency doubler as generally described above. The timing circuit also utilizes at least one additional logic circuit. The timing circuit provides timing signals synchronized with the reading of the data from the badge or the like.