The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 1977

Filed:

Jan. 10, 1975
Applicant:
Inventors:

Michael W Tallent, San Jose, CA (US);

Lee E Scaggs, Mountain View, CA (US);

Allan L Swain, Palo Alto, CA (US);

Ronnie M Harrison, San Jose, CA (US);

William B Hendershot, III, San Jose, CA (US);

Assignee:

Consolidated Video Systems, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N / ; H04N / ;
U.S. Cl.
CPC ...
358-8 ; 358 19 ;
Abstract

An input voltage controlled oscillator circuit for a digital video time base corrector used to process television signals to remove time base errors introduced during signal recording, reproducing, or transmission. In the time base corrector, incoming video signals are converted from analog-to-digital form, temporarily stored in a memory unit at a clocking rate which varies in a manner generally proportional to the time base errors, and the stored signals are fetched at a standard clocking rate. The input voltage controlled oscillator circuit generates the clock signals for performing the analog-to-digital conversion and for storing the digital signals in the memory unit. The frequency of the clock signals varies in accordance with the time base errors in the composite sync and burst portions of the incoming video signals. The VCO circuit includes an oscillator for generating an integral multiple of the clock signal train, a first phase lock loop controlled by the frequency of successive composite sync pulses in the incoming video signal, a second phase lock loop controlled by the colorburst portion of successive lines of video information, a gated integrator coupled to the second phase lock loop for integrating successive ones of the VCO control signals generated by the second phase lock loop over a plurality of successive lines of video, and means for enabling the gated integrator during the colorburst portion of successive lines of video. The VCO circuit further includes means for disabling the gating means and the gated integrator when one of the colorburst portions of the video signals lies below a predetermined threshold.


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